EPM3064ALC44-10 vs EPM3064ALC44-4 Vergleich

Detaillierter Direktvergleich von EPM3064ALC44-10 von Altera und EPM3064ALC44-4 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM3064ALC44-10 EPM3064ALC44-4
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $4,12 $4,36
Family MAX 3000A —
Logic Elements / Macrocells 64 macrocells —
Number of Logic Array Blocks (LABs) 4 —
Usable Gates 1,250 —
Maximum User I/O Pins 34 —
Supply Voltage (VCCINT) 3.3 V —
Pin-to-Pin Delay (tPD) 10 ns 4.5 ns
Maximum Counter Frequency (fCNT) 192.3 MHz —
Maximum Operating Frequency (fMAX) [DATA_NEEDED: fMAX internal] —
Gehäuse 44-PLCC (J-Lead) —
Process Technology 0.30 µm CMOS EEPROM —
Programmability In-system programmable (JTAG IEEE 1149.1) —
MultiVolt I/O 2.5V / 3.3V / 5.0V interface compatible —
Betriebstemperatur 0°C to +70°C (commercial) —
RoHS-Status Compliant (lead-free L suffix indicates Pb-free package) [DATA_NEEDED: rohs status]
Montageart Surface Mount (PLCC socket compatible) Surface Mount (PLCC J-Lead, socket-compatible)
Manufacturer — Altera (Intel Programmable Solutions Group)
Part Family — MAX 3000A
Device Type — CPLD (Complex Programmable Logic Device)
Macrocells — 64
Logic Array Blocks (LABs) — 2
User I/O Pins — 34
Propagation Delay — 4.5 ns (max)
Supply Voltage - Internal (VCCINT) — 3.3 V
Supply Voltage - I/O (VCCIO) — 2.5 V / 3.3 V / 5.0 V
In-System Programmability — Yes (IEEE 1149.1 JTAG, 3.3-V ISP)
Program Memory Type — EEPROM (non-volatile)
Gehäuse / Bauform — 44-LCC (J-Lead), PLCC-44
Operating Temperature Grade — Commercial
Terminal Form — J BEND
Package Code — QCCJ (J-Lead Chip Carrier)
Package Shape — Square
Number of Terminals — 44
Technology — CMOS EEPROM

Datenblätter & Ressourcen

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