EPM3064ATC100-10N vs EPM3064ATC100-4 Vergleich
Detaillierter Direktvergleich von EPM3064ATC100-10N von Altera und EPM3064ATC100-4 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3064ATC100-10N | EPM3064ATC100-4 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $2,43 | $5,20 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (EEPROM-based) |
| Macrocells | 64 | — |
| Logic Array Blocks (LABs) | 2 | 2 |
| Maximum User I/O Pins | 66 | 34 |
| Usable Gates | 1,250 | 1,250 (range 600 to 10,000 across family) |
| Pin-to-Pin Delay (tPD) | 10 ns | 4.5 ns |
| Supply Voltage (VCCINT) | 3.3 V (3.0 V to 3.6 V) | — |
| In-System Programmability | Yes - IEEE Std. 1149.1 JTAG, IEEE Std. 1532 | — |
| Boundary-Scan Test (BST) | Yes - JTAG compliant | — |
| Configuration Memory | Non-volatile EEPROM | — |
| Program/Erase Cycles | 100 minimum | — |
| MultiVolt I/O | Yes - 1.8 V / 2.5 V / 3.3 V / 5 V tolerant | — |
| Betriebstemperatur | 0C to +70C (commercial) | 0C to +70C (commercial) [DATA_NEEDED: industrial temp grade option] |
| Gehäuse | 100-pin TQFP | 100-pin TQFP |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant (lead-free) | unknown |
| Macro Cells | — | 64 |
| Counter Frequency (fCNT) | — | 227.3 MHz |
| Internal Performance | — | 222.2 MHz |
| Supply Voltage VCCINT | — | 3.3 V |
| I/O Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5.0 V |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| Process Technology | — | CMOS EEPROM |
| Architecture | — | 5-level Altera MAX |