EPM3064ATC44-10N vs EPM3064ALC44-4N Vergleich
Detaillierter Direktvergleich von EPM3064ATC44-10N von Altera und EPM3064ALC44-4N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM3064ALC44-4N - 64-Macrocell CPLD, 4.5ns, 44-PLCC | Intel
EPM3064ALC44-4N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM3064ATC44-10N | EPM3064ALC44-4N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $5,10 | $4,80 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 1250 | 1.25K |
| Macro Cells | 64 | — |
| User I/O Pins | 34 | — |
| Logic Array Blocks (LABs) | 4 | 2 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 192.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Standard | MultiVolt (mixed 1.5 V / 1.8 V / 2.5 V / 3.3 V) | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programming | IEEE Std. 1532 compliant | — |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) compliant | — |
| Gehäuse | TQFP-44 (10x10 mm) | 44-pin PLCC (J-lead) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to +70C (commercial) | 0C to +70C (commercial) |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Pin-Locking | Yes (across design iterations) | — |
| Logic Elements / Macrocells | — | 64 macrocells |
| Number of I/O Pins | — | 34 |
| Propagation Delay (tPD) | — | 4.5 ns |
| Maximum Operating Frequency | — | 222.2 MHz |
| Supply Voltage - Core | — | 3.3 V |
| I/O Logic Level Support | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Program Memory Type | — | EEPROM (in-system programmable) |
| Programming Interface | — | IEEE Std 1149.1 JTAG |
| Hot Socketing | — | Supported |