EPM3064ATI44-10NAD vs EPM3064ATI44-7N Vergleich
Detaillierter Direktvergleich von EPM3064ATI44-10NAD von Altera und EPM3064ATI44-7N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM3064ATI44-10NAD - MAX 3000A 64-Macrocell CPLD 44-TQFP | Altera
EPM3064ATI44-10NAD ObsoleteSpezifikationsvergleich
| Parameter | EPM3064ATI44-10NAD | EPM3064ATI44-7N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,10 | $5,10 |
| Family | MAX 3000A | MAX 3000A |
| Macrocells | 64 | — |
| Usable Gates | 1,250 | 1,250 gates |
| Logic Array Blocks (LABs) | 4 (16 macrocells each) | — |
| User I/Os (max) | 34 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Setup Time (tSU) | 4.5 ns | — |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 3.3 V or 2.5 V | — |
| Gehäuse | TQFP-44 | 44-pin TQFP (10x10 mm, 0.8 mm pitch) |
| Betriebstemperatur | -40C to +85C (Industrial) | — |
| Programming Interface | JTAG (IEEE Std. 1532 compliant) | IEEE 1149.1 JTAG |
| In-System Programmable | Yes | — |
| RoHS-Status | Compliant | Compliant (lead-free, 'N' suffix) |
| Montageart | Surface Mount | — |
| Logic Elements / Macrocells | — | 64 macrocells |
| Maximum Frequency (fMAX) | — | 135.1 MHz |
| Pin-to-Pin Logic Delay | — | 7 ns (speed grade -7) |
| User I/O Count | — | 34 I/O |
| Dedicated Input Pins | — | 4 |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Bank Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5 V tolerant (multiVolt) |
| Program Memory Type | — | EEPROM (in-system programmable) |
| Operating Temperature Grade | — | Industrial (-40C to +85C) |
| Process Technology | — | 0.30 µm CMOS EEPROM |