EPM3128ATC144-10 vs EPM3128ATC144-5 Vergleich
Detaillierter Direktvergleich von EPM3128ATC144-10 von Altera und EPM3128ATC144-5 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3128ATC144-10 | EPM3128ATC144-5 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $6,20 | $4,85 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | — |
| User I/Os | 96 | — |
| Usable Gates | 2,500 (typical) | — |
| Logic Elements / LABs | 4 Logic Array Blocks | — |
| Propagation Delay (tPD) | 10 ns (speed grade -10) | 7.5 ns |
| Counter Frequency (fCNT) | Up to 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| MultiVolt I/O Interface | 1.5V / 1.8V / 2.5V / 3.3V | — |
| In-System Programmability | IEEE Std. 1532 compliant | Yes (IEEE Std. 1532 compliant) |
| Boundary-Scan Test | IEEE Std. 1149.1 (JTAG) | — |
| Configuration Memory | EEPROM (non-volatile, instant-on) | — |
| Gehäuse | 144-pin TQFP (TQ144) | TQFP-144 (Plastic, 1.0 mm pitch, 22x22 mm) |
| Montageart | Surface Mount | — |
| Betriebstemperatur | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| RoHS-Status | Compliant | Not Compliant (per Arrow distributor listing) |
| Lead-Free | Yes | — |
| Logic Family | — | CMOS |
| Number of Macrocells | — | 128 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Number of User I/Os | — | 96 |
| Device System Gates | — | 2500 |
| Product Terms per Macrocell | — | 32 |
| Maximum Internal Frequency | — | 192.3 MHz |
| Number of Global Clocks | — | 2 |
| Program Memory Type | — | EEPROM (non-volatile) |
| Supply Voltage (Core) | — | 3.3 V |
| Multi-Volt I/O Voltage | — | 2.5 V / 3.3 V / 5.0 V tolerant |
| JTAG / IEEE 1149.1 | — | Yes (boundary-scan + ISP) |
| Process Technology | — | 0.30 um CMOS EEPROM, 4 metal layers |
| ECCN | — | EAR99 |
| HTS Code | — | 8542.31.00.55 |