EPM3256AQC208-7 vs EPM3256AQC208-10 Vergleich
Detaillierter Direktvergleich von EPM3256AQC208-7 von Altera und EPM3256AQC208-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM3256AQC208-10 - MAX 3000A CPLD 256 Macrocells 10ns 208-PQFP | Intel / Altera
EPM3256AQC208-10 ObsoleteSpezifikationsvergleich
| Parameter | EPM3256AQC208-7 | EPM3256AQC208-10 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $17,20 | $15,20 |
| Manufacturer | Altera (now Intel FPGA) | — |
| Series | MAX 3000A | — |
| Programmable Type | In-System Programmable (EEPROM) | — |
| Number of Macrocells | 256 | — |
| Number of Logic Elements / Blocks | 16 LABs | — |
| Number of Usable Gates | 5,000 | — |
| Number of I/O Pins | 158 - 161 | — |
| Propagation Delay (tpd) | 7.5 ns max | — |
| Maximum Counter Frequency | 126.6 MHz | — |
| Supply Voltage - Internal | 3.0 V to 3.6 V (3.3 V nominal) | — |
| I/O Logic Level Compatibility | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| Betriebstemperatur | 0 °C to 70 °C (Commercial) | 0 °C to +70 °C (Commercial) |
| Montageart | Surface Mount | Surface Mount |
| Gehäuse / Bauform | 208-BFQFP (PQFP-208, 28x28 mm) | — |
| Supplier Device Package | 208-PQFP | — |
| ISP Standard | IEEE Std. 1532 | — |
| Process Technology | CMOS EEPROM | — |
| Product Status | Active (legacy line) | — |
| Family | — | MAX 3000A |
| Logic Family | — | CMOS (EEPROM-based) |
| Macrocells | — | 256 |
| Usable Gates | — | 5,000 |
| User I/Os | — | 161 |
| Anzahl der Pins | — | 208 |
| Gehäuse | — | 208-BFQFP (PQFP, Gull Wing) |
| Pin-to-Pin Propagation Delay | — | 10 ns |
| Counter Frequency (max) | — | 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Tolerance | — | MultiVolt 2.5 V / 3.3 V / 5.0 V tolerant |
| Programming Interface | — | IEEE 1149.1 JTAG (ISP) |
| PCI-SIG Compliance | — | Yes (speed grades -4, -5, -6, -7, -10) |
| Global Clock Networks | — | 4 (CLK, CLR, OE, GCLK) |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |