EPM3256ATC144-10 vs EPM3256ATI144-10 Vergleich
Detaillierter Direktvergleich von EPM3256ATC144-10 von Intel und EPM3256ATI144-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM3256ATC144-10 - 256-Macrocell CPLD, 10ns, 144-TQFP | Intel / Altera
EPM3256ATC144-10 ObsoleteSpezifikationsvergleich
| Parameter | EPM3256ATC144-10 | EPM3256ATI144-10 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,75 | $0,00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Programmable Type | In-System Programmable (EEPROM-based, IEEE 1532) | In-System Programmable (ISP), EEPROM-based |
| Macrocells | 256 | — |
| Logic Array Blocks (LABs) | 16 | — |
| Usable Gates | 5,000 | — |
| Number of I/O Pins | 116 | — |
| Propagation Delay (tpd max) | 10 ns | 10 ns |
| Counter Frequency (max) | 95.2 MHz | — |
| Core Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | — |
| I/O Logic Level Support | MultiVolt - 5.0 V, 3.3 V, 2.5 V | — |
| Betriebstemperatur | 0 C to +70 C (Commercial) | -40°C to +85°C (industrial) |
| Gehäuse | 144-pin TQFP (20x20 mm) | 144-pin TQFP (20x20 mm) |
| Montageart | Surface Mount | Surface Mount |
| JTAG / Boundary Scan | Yes (IEEE 1149.1) | — |
| Process Technology | CMOS EEPROM | — |
| RoHS-Status | Non-compliant (original EPM3256ATC144-10); N suffix variant is lead-free | — |
| Number of Macrocells | — | 256 |
| Number of Logic Elements / Blocks | — | 16 LABs (Logic Array Blocks) |
| Number of Gates | — | 5,000 typical usable gates |
| Number of User I/O | — | 116 |
| Maximum Frequency (fmax) | — | 95.2 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V (3.3 V nominal) |
| I/O Voltage Support | — | MultiVolt: 1.8 V / 2.5 V / 3.3 V / 5.0 V mixed |
| Logic Family | — | CMOS, EEPROM-based |
| Programming Interface | — | JTAG (IEEE 1149.1) and IEEE Std. 1532 ISP |
| Compliance | — | IEEE Std. 1532 ISP, PCI-compatible I/O |
| Lebenszyklusstatus | — | Obsolete (per HighqualityPCB listing) |