EPM3256ATI144-10N vs EPM3256ATI144-7N Vergleich
Detaillierter Direktvergleich von EPM3256ATI144-10N von Altera und EPM3256ATI144-7N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM3256ATI144-7N - 256-Macrocell MAX 3000A CPLD, 7.5ns, TQFP-144 | Altera
EPM3256ATI144-7N ObsoleteSpezifikationsvergleich
| Parameter | EPM3256ATI144-10N | EPM3256ATI144-7N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,25 | $10,95 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD - Complex Programmable Logic Device | CPLD (Complex Programmable Logic Device) |
| Macrocells | 256 | 256 |
| Usable Gates | 5,000 | 5,000 |
| User I/Os | 116 | — |
| Logic Blocks / Logic Elements | 16 | — |
| Propagation Delay (tPD) | 10 ns | 7.5 ns (typical) |
| Max Frequency (fMAX) | 95.2 MHz | — |
| Supply Voltage - Core | 3.3 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (multi-voltage) | — |
| In-System Programmability | Yes, IEEE Std. 1532 compliant | — |
| Boundary-Scan Test (BST) | Yes, IEEE Std. 1149.1 (JTAG) | — |
| Gehäuse | 144-pin TQFP | TQFP-144 (20 x 20 mm, 0.5 mm pitch) |
| Betriebstemperatur | -40 C to +85 C (industrial, "I" suffix) | -40C to +85C (industrial) |
| Lead-Free / Pb-Free | Yes ("N" suffix) | — |
| RoHS-Status | Compliant | Compliant (lead-free) |
| Process Technology | CMOS EEPROM-based, non-volatile | — |
| Montageart | Surface Mount | — |
| MSL-Level | 3 (per JEDEC J-STD-020, typical for TQFP) | — |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 116 |
| Maximum Internal Frequency | — | 126.6 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| MultiVolt I/O Logic Levels | — | 5.0 V / 3.3 V / 2.5 V |
| Programming Technology | — | EEPROM (in-system programmable) |
| JTAG / ISP | — | IEEE Std. 1532 compliant |
| Boundary Scan | — | IEEE Std. 1149.1 (JTAG) |
| Hot-Socketing Support | — | Yes |