EPM3512AFC256-19 vs EPM3512AFC256-2 Vergleich
Detaillierter Direktvergleich von EPM3512AFC256-19 von Altera und EPM3512AFC256-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3512AFC256-19 | EPM3512AFC256-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,85 | $14,85 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 512 | 512 |
| Usable Gates | 10000 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum Operating Frequency | 80 MHz | [DATA_NEEDED: fMAX MHz] |
| Pin-to-Pin Delay (tPD) | 7.5 ns | — |
| Speed Grade | -19 | -2 |
| User I/O Pins | 208 | — |
| Gehäuse | 256-ball FineLine BGA (FC) | BGA-256 (FineLine BGA) |
| Supply Voltage VCCINT | 3.3 V | — |
| I/O Supply Voltage VCCIO | 2.5 V or 3.3 V (5.0 V tolerant inputs) | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP (IEEE 1532) | JTAG (IEEE Std 1149.1) / ByteBlaster |
| Process Technology | 0.30 µm CMOS EEPROM | 0.30 um CMOS EEPROM |
| Betriebstemperatur | -40C to +85C (industrial) | 0C to +70C (commercial) |
| Non-volatile Configuration | Yes (EEPROM-based) | — |
| Montageart | Surface Mount | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Maximum User I/O Pins | — | 212 |
| Propagation Delay (tPD, -2 grade) | — | [DATA_NEEDED: tPD ns] |
| Core Supply Voltage | — | 3.3 V |
| I/O Output Drive Voltage | — | 2.5 V or 3.3 V (MultiVolt) |
| Input Tolerance | — | 2.5 V, 3.3 V, 5.0 V tolerant |
| Ball Pitch | — | 1.0 mm |