EPM3512AQI208-10N vs EPM3512AQI208-7N Vergleich
Detaillierter Direktvergleich von EPM3512AQI208-10N von Intel und EPM3512AQI208-7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3512AQI208-10N | EPM3512AQI208-7N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $12,90 | $18,45 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Family | CMOS EEPROM-based | — |
| Macro Cells | 512 | — |
| Logic Array Blocks (LABs) | 12 | 16 |
| User I/Os | 172 (max), 208-pin package | — |
| Propagation Delay (tPD) | 10 ns | [DATA_NEEDED: tPD in ns per speed grade 7] |
| Versorgungsspannung | 3.3 V | — |
| I/O Standards | MultiVolt (2.5 V / 3.3 V / 5 V tolerant) | — |
| Package Type | PQFP-208 (FINE LINE BGA-style 256-pin land) | — |
| Pins | 256 (package), 208 used | — |
| Betriebstemperatur | 0C to 70C | Industrial (per 'N' suffix) |
| Montageart | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1) / ISP (IEEE 1532) | IEEE 1149.1 JTAG (in-system programmable) |
| Compliance | RoHS status unknown from data | — |
| Boundary Scan | Built-in BST (IEEE 1149.1) | — |
| Configuration Memory | On-chip EEPROM, non-volatile | EEPROM (non-volatile) |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 10,000 |
| Macrocells | — | 512 |
| Maximum Operating Frequency | — | 116.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (MultiVolt) |
| Gehäuse | — | 208-pin PQFP |
| Speed Grade | — | 7 (7N suffix) |
| Pin-Anzahl | — | 208 |
| RoHS-Status | — | Compliant |
| User I/O Pins | — | [DATA_NEEDED: exact user I/O count for PQFP-208] |