EPM3512AQI208-7N vs EPM3512AQI208-10N Vergleich
Detaillierter Direktvergleich von EPM3512AQI208-7N von Intel und EPM3512AQI208-10N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3512AQI208-7N | EPM3512AQI208-10N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $18,45 | $12,90 |
| Family | MAX 3000A | MAX 3000A |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 10,000 | — |
| Macrocells | 512 | — |
| Logic Array Blocks (LABs) | 16 | 12 |
| Maximum Operating Frequency | 116.3 MHz | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V (MultiVolt) | — |
| Gehäuse | 208-pin PQFP | — |
| Programming Interface | IEEE 1149.1 JTAG (in-system programmable) | JTAG (IEEE 1149.1) / ISP (IEEE 1532) |
| Configuration Memory | EEPROM (non-volatile) | On-chip EEPROM, non-volatile |
| Speed Grade | 7 (7N suffix) | — |
| Betriebstemperatur | Industrial (per 'N' suffix) | 0C to 70C |
| Pin-Anzahl | 208 | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant | — |
| User I/O Pins | [DATA_NEEDED: exact user I/O count for PQFP-208] | — |
| Propagation Delay (tPD) | [DATA_NEEDED: tPD in ns per speed grade 7] | 10 ns |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Family | — | CMOS EEPROM-based |
| Macro Cells | — | 512 |
| User I/Os | — | 172 (max), 208-pin package |
| Versorgungsspannung | — | 3.3 V |
| I/O Standards | — | MultiVolt (2.5 V / 3.3 V / 5 V tolerant) |
| Package Type | — | PQFP-208 (FINE LINE BGA-style 256-pin land) |
| Pins | — | 256 (package), 208 used |
| Compliance | — | RoHS status unknown from data |
| Boundary Scan | — | Built-in BST (IEEE 1149.1) |