EPM5016DC-15 vs EPM5016DC-20 Vergleich

Detaillierter Direktvergleich von EPM5016DC-15 von Altera und EPM5016DC-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5016DC-15 EPM5016DC-20
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $10,75 $16,50
Device Family MAX 5000 —
Product Type EPLD (Erasable Programmable Logic Device) —
Macrocells 16 16
Logic Array Blocks (LABs) 2 —
Dedicated Inputs 4 7
User I/O Pins 12 —
Pin-to-Pin Delay (tpd) 15 ns —
Maximum Frequency (fmax) 71 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V —
Programming Voltage (VPP) 12.75 V —
Betriebstemperatur 0 °C to 70 °C (commercial) [DATA_NEEDED: operating temperature range]
Gehäuse Ceramic DIP-24 (windowed) —
Montageart Through-Hole —
Process Technology CMOS EPROM CMOS, UV-erasable
Configuration Memory Non-volatile UV-erasable EPROM —
RoHS-Status [DATA_NEEDED: RoHS status - pre-RoHS era part, likely non-compliant] [DATA_NEEDED: RoHS compliance]
Lead Finish [DATA_NEEDED: lead-free status] —
Family — MAX 5000
Device Type — EPLD (UV-Erasable Programmable Logic Device)
Product Terms — 160
I/O Pins — 8
Propagation Delay (tPD) — 20 ns
Maximale Taktfrequenz — 62.5 MHz
Maximum Supply Voltage — 5.25 V
Nominal Supply Voltage — 5.0 V
Architecture — PAL-type macrocell with Programmable Interconnect Array (PIA)
Package Type — 20-pin Ceramic DIP (Cerdip) with UV window
Package Suffix Code — DC = Ceramic DIP, Commercial
Speed Grade — -20 = 20 ns tPD
Programming Method — UV erase + EPROM-style programming via Altera programming hardware

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