EPM5032DC-25 vs EPM5032DI25 Vergleich

Detaillierter Direktvergleich von EPM5032DC-25 von Altera und EPM5032DI25 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5032DC-25 EPM5032DI25
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $3,55 $11,10
Manufacturer Altera (Intel Programmable Solutions Group) —
Product Family MAX 5000 —
Device Type UV Erasable Programmable Logic Device (EPLD) UV-erasable EPLD (CMOS EPROM-based)
Macrocells 32 32
Pin-to-Pin Propagation Delay (tPD) 25 ns —
Maximum Counter Frequency (fCNT) [DATA_NEEDED: maximum counter frequency] —
Setup Time (tSU) [DATA_NEEDED: setup time] —
Number of Dedicated Inputs 32 (in DIP-28 pinout) —
Number of I/O Pins 22 (in DIP-28 pinout, 4 used as dedicated inputs) —
Gehäuse CDIP-28 (Windowed Ceramic DIP-28) 24-pin Ceramic DIP (DI) with quartz window
Process Technology CMOS, EPROM (UV-Erasable) —
Architecture PAL-Type, Single-LAB, 32-Macrocell —
Output Structure Programmable I/O with output enable —
Flip-Flop Configuration D, T, JK, or SR (programmable) —
Betriebstemperatur [DATA_NEEDED: operating temperature range] —
RoHS-Status Lead Free / RoHS Compliant (per distributor listings) —
Programming Method UV erase + Altera/Intel MAX+PLUS II programmer —
Erasure Method UV light through ceramic window —
Family — MAX 5000
Logic Array Blocks (LABs) — 2
Product Terms — 320
Output Macrocells — 16
Bidirectional I/O Pins — 16
Dedicated Inputs — 7
Total Inputs — 24
Pin-to-Pin Delay (tPD) — 25 ns
Maximum Clock Frequency (fMAX) — 62.5 MHz
Supply Voltage (VCC) — 5 V (single supply)
I/O Standard — TTL-compatible
Programming Technology — UV-EPROM (erasable via quartz window)

Datenblätter & Ressourcen

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