EPM5032JC-20 vs EPM5032DC-20 Vergleich

Detaillierter Direktvergleich von EPM5032JC-20 von Altera und EPM5032DC-20 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5032JC-20 EPM5032DC-20
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $9,75 $5,05
Product Type UV-erasable Programmable Logic Device (PLD) —
Family MAX 5000 —
Macrocells 32 32
Logic Array Blocks (LABs) 1 —
Product Terms (P-terms) 320 —
Propagation Delay (tPD) 20 ns —
Maximale Taktfrequenz 62.5 MHz —
Setup Time 10 ns —
I/O Lines 16 (bidirectional) —
Dedicated Inputs 8 —
Total Inputs 24 —
Gehäuse 68-pin JLCC (windowed ceramic) 20-pin DIP (Windowed Ceramic, 0.3" wide)
Process Technology CMOS —
Erase Method UV (12V VPP + ultraviolet exposure) —
Programming Voltage (VPP) 12 V —
Architecture PAL-type AND-OR array with PIA interconnect —
Lebenszyklusstatus Obsolete (legacy Altera MAX 5000) —
Product Family — MAX 5000
Device Type — CPLD (Complex Programmable Logic Device)
Programmable Technology — UV-Erasable / OTP EPROM
Usable Gates — 600
Maximum Frequency (fCNT) — 71.4 MHz
Pin-to-Pin Delay (tPD) — 20 ns
Speed Grade — -20
Supply Voltage (VCC) — 5 V
Montageart — Through-Hole
Logic Blocks — 4 Logic Array Blocks (LABs)
I/O Pins — [DATA_NEEDED: I/O pin count for DIP-20 variant]
Betriebstemperatur — [DATA_NEEDED: commercial/industrial/military grade]
RoHS-Status — Compliant (per IC-Components listing)
Lead Free — [DATA_NEEDED: confirmed lead-free]
Manufacturer — Altera (now Intel Programmable Solutions Group)
Programming Method — Altera MAX+PLUS II / Quartus (legacy support)

Datenblätter & Ressourcen

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