EPM5032PC-20 vs EPM5032LC-20 Vergleich

Detaillierter Direktvergleich von EPM5032PC-20 von Altera und EPM5032LC-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5032PC-20 EPM5032LC-20
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $7,05 $8,40
Device Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) —
Programming Type OTP (One-Time Programmable) —
Macrocells 32 32
Usable Gates 600 600 gates
Logic Blocks 2 Logic Array Blocks —
Product Terms 320 —
Dedicated Inputs 24 7
Bidirectional I/O Lines 16 —
Propagation Delay (tPD) 20 ns 20 ns
Maximale Taktfrequenz 62.5 MHz —
Supply Voltage (VCC) 4.75 V to 5.25 V (nominal 5 V) 5 V ±5%
Technology CMOS, 0.65 um process —
Architecture PAL-type macrocells with Programmable Interconnect Array (PIA) —
Gehäuse PDIP-28 (Plastic DIP, 28-pin) LCC-28 (Plastic Leaded Chip Carrier, J-lead)
Betriebstemperatur [DATA_NEEDED: operating temperature range] 0 °C to +70 °C (commercial; -55 °C to +125 °C military per /883B variants)
Montageart Through-Hole Surface Mount
RoHS-Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Product Type — EPLD / CPLD (One-Time Programmable / UV-Erasable)
Logic Blocks (LABs) — 1
Speed Grade — -20 (20 ns pin-to-pin)
Maximum Frequency — 71.4 MHz
Bidirectional I/O Pins — 16
Total Inputs — 24
Output Functions — 16
Product Terms per Output — 16
Programmable Interconnect — Programmable Interconnect Array (PIA)
MSL-Level — [DATA_NEEDED: MSL]

Datenblätter & Ressourcen

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