EPM5128GM883B vs EPM5128JC Vergleich
Detaillierter Direktvergleich von EPM5128GM883B von Altera und EPM5128JC von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5128GM883B | EPM5128JC |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $159,25 | $9,75 |
| Family | MAX 5000 | — |
| Device Type | UV EPLD (Erasable Programmable Logic Device) | EPLD / CPLD |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 | — |
| User I/O Pins | 52 | [DATA_NEEDED: user I/O pin count] |
| Dedicated Inputs | 7 | 8 |
| Propagation Delay (tpd) | 55 ns | — |
| External Clock Inputs | 1 | — |
| Technology | CMOS | — |
| Configuration Memory | UV-erasable EPROM | UV-erasable EPROM (windowed package) |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Gehäuse | PGA-883 (ceramic pin grid array) | — |
| Betriebstemperatur | -55C to +125C (military) | Commercial 0C to +70C |
| Qualification | MIL-STD-883 Class B (suffix 883B) | — |
| Program/Erase Method | UV-erasable | — |
| Product Family | — | MAX 5000 |
| Macrocell Count | — | 128 |
| Propagation Delay (tPD) | — | 35 ns |
| Logic Elements | — | Programmable AND/OR/XOR array |
| Supply Voltage (VCC) | — | 5 V (typical) |
| Anzahl der Pins | — | 68 |
| Package Type | — | PLCC-68 (JLCC) ceramic, J-leaded |
| Programming Interface | — | Altera MAX+PLUS II / A+PLUS / legacy programmer |
| Montageart | — | Surface Mount (PLCC socket or solder) |
| Boundary Scan | — | JTAG IEEE 1149.1 (family feature) |
| Process Technology | — | CMOS EPROM |
| RoHS-Status | — | [DATA_NEEDED: RoHS status - legacy part] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |