EPM5128LC2 vs EPM5128GC-2 Vergleich
Detaillierter Direktvergleich von EPM5128LC2 von Altera und EPM5128GC-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera
EPM5128LC2 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM5128LC2 | EPM5128GC-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $22,40 | $8,95 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| Interconnect | Programmable Interconnect Array (PIA) | — |
| Global Clock Inputs | 1 dedicated | — |
| Propagation Delay (tPD) | 45 ns | Approx. 25 ns (typical, -2 speed grade) |
| Supply Voltage (VCC) | 5 V | 5 V (nominal) |
| Process Technology | CMOS EPROM | — |
| Configuration Memory | On-chip EPROM (non-volatile) | Non-volatile, one-time programmable (erasable via UV) |
| Boundary Scan | JTAG / IEEE 1149.1 | — |
| Betriebstemperatur | -40 C to +85 C (extended commercial) | 0C to +70C (commercial) |
| Gehäuse | PGA (Pin Grid Array, ceramic) | — |
| Montageart | Through-Hole / Socketed | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | — |
| Logic Elements / Gates | — | 2,500 usable gates |
| Number of Usable Gates | — | 2,500 |
| Maximum Operating Frequency | — | 50 MHz |
| Package Type | — | 68-pin PGA (Pin Grid Array) |
| Package Code (per Partstack) | — | WPGA |
| Number of Terminals | — | 68 |
| Programming Technology | — | UV-erasable EPROM |
| Grade (per Partstack) | — | COMMERCIAL |
| Terminal Form | — | PIN/PEG |