EPM5192AGC-20 vs EPM5192AGC84-20 Vergleich
Detaillierter Direktvergleich von EPM5192AGC-20 von Intel und EPM5192AGC84-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192AGC-20 | EPM5192AGC84-20 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $41,20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (EEPLD, UV-erasable) | — |
| Macrocells | 192 | 192 |
| Usable Gates | 12,000 | — |
| Propagation Delay (tPD) | 20 ns | — |
| Counter Frequency (fCNT) | 100 MHz (max) | — |
| Supply Voltage (VCC) | 5 V (4.75 V to 5.25 V) | — |
| Logic Array Blocks (LABs) | 8 | — |
| Dedicated I/O Pins | 96 | — |
| Programming Interface | IEEE 1149.1 JTAG | — |
| In-System Programmability | Yes (5 V ISP) | — |
| Security Bit | Yes (pattern read-back protected) | — |
| Gehäuse | PGA-132 (ceramic windowed, 'GC') | 84-pin Ceramic Pin Grid Array (CPGA, WPGA) |
| Montageart | Through-hole (PGA socket) | Through-Hole (Pin Grid Array socket) |
| Betriebstemperatur | 0C to 70C (commercial) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status - ceramic PGA windowed parts are typically pre-RoHS] | [DATA_NEEDED: RoHS compliance] |
| Product Type | — | Complex Programmable Logic Device (CPLD) |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| Logic Gates (typical) | — | [DATA_NEEDED: typical gate count] |
| Maximum Clock Frequency (fMAX) | — | 66.7 MHz |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Speed Grade | — | -20 |
| Package Code | — | WPGA |
| Erasure Method | — | UV-Erasable (with OTP window) |
| Process Technology | — | CMOS |
| Operating Temperature Grade | — | Commercial |
| Versorgungsspannung | — | [DATA_NEEDED: VCC range] |
| I/O Standard | — | 5V CMOS / TTL compatible |