EPM5192AGC84-15 vs EPM5192AJC-25 Vergleich

Detaillierter Direktvergleich von EPM5192AGC84-15 von Altera und EPM5192AJC-25 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5192AGC84-15 EPM5192AJC-25
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $42,00 $8,20
Family MAX 5000 MAX 5000 EPLD
Device Type UV-Erasable/OTP Complex PLD —
Macrocells 192 192
Logic Array Blocks (LABs) 12 —
User I/O Pins 64 —
Dedicated Inputs 7 —
Propagation Delay (tPD) 15 ns 25 ns
Maximum Internal Clock Frequency 83.3 MHz —
Supply Voltage (VCC) 4.5 V to 5.5 V —
Process Technology CMOS —
Programmable Element UV-Erasable EPROM cell —
Gehäuse 84-pin Ceramic PGA (Pin Grid Array) PLCC-68 (windowed ceramic, AJC)
Montageart Through-Hole Surface Mount
Betriebstemperatur Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] [DATA_NEEDED: exact operating temperature range]
RoHS-Status [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] [DATA_NEEDED: RoHS compliance status]
Manufacturer — Altera (now Intel PSG)
Pin-Anzahl — 68
Versorgungsspannung — 5 V (typical)
Logic Blocks — MAX 5000 LABs (Logic Array Blocks)
Programmable Pins — [DATA_NEEDED: number of user I/O pins]
Erasure Method — UV-erasable (windowed ceramic package)
Programming Technology — EPROM (non-volatile)
Military Grade — Likely MIL-STD-883 processing per 'J' suffix in AJC marking (verify)

Datenblätter & Ressourcen

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