EPM5192AGC84-15 vs EPM5192AJI84-15 Vergleich
Detaillierter Direktvergleich von EPM5192AGC84-15 von Altera und EPM5192AJI84-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192AGC84-15 | EPM5192AJI84-15 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $42,00 | $27,80 |
| Family | MAX 5000 | — |
| Device Type | UV-Erasable/OTP Complex PLD | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 16 |
| User I/O Pins | 64 | 84 |
| Dedicated Inputs | 7 | — |
| Propagation Delay (tPD) | 15 ns | 15 ns |
| Maximum Internal Clock Frequency | 83.3 MHz | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V | 4.5 V to 5.5 V (nominal 5 V) |
| Process Technology | CMOS | CMOS EPROM (UV-erasable) |
| Programmable Element | UV-Erasable EPROM cell | — |
| Gehäuse | 84-pin Ceramic PGA (Pin Grid Array) | — |
| Montageart | Through-Hole | Through-Hole (SMD socket-compatible) |
| Betriebstemperatur | Commercial (0C to +70C) - [DATA_NEEDED: military/industrial temp grade range] | -40 °C to +85 °C (Industrial, 'I' suffix) |
| RoHS-Status | [DATA_NEEDED: not declared in web data; ceramic PGA with UV window typically non-RoHS] | unknown |
| Device Family | — | MAX 5000 EPLD |
| Product Type | — | UV-Erasable / OTP Complex PLD |
| Package Type | — | 84-pin JLCC (J-Leaded Ceramic Chip Carrier) with quartz window |
| Programming Method | — | UV erase + EPROM program via standard Altera programmer |
| Design Tool Support | — | MAX+PLUS II (legacy); not supported by modern Quartus Prime |
| Lead-Free | — | unknown |
| Halogenfrei | — | unknown |
| Functional Equivalent (Plastic OTP) | — | EPM5192AJC84-15 (windowless plastic JLCC, same die) |