EPM5192ALC84-15 vs EPM5192ALM84-20 Vergleich
Detaillierter Direktvergleich von EPM5192ALC84-15 von Altera und EPM5192ALM84-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192ALC84-15 | EPM5192ALM84-20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $13,20 | $10,25 |
| Device Family | MAX 5000 (EPM5192) | — |
| Device Type | CPLD / UV-Erasable / OTP Complex PLD | UV-Erasable/OTP Complex PLD (CPLD) |
| Macrocells | 192 | 192 |
| Dedicated Inputs | 7 | 7 |
| User I/O Pins | 64 | 64 |
| Propagation Delay (tPD) | 15 ns | 33 ns |
| Propagation Delay (Industry Variant) | 25 ns (per MicrochipUSA listing) | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (nominal 5 V) | — |
| Process Technology | CMOS (EPROM-based) | CMOS |
| Programmability | UV-erasable window / OTP | — |
| Gehäuse | 84-pin PLCC (QCCJ, J-bend ceramic) | 84-pin PQCC (PLCC), J-Lead, surface-mount |
| Operating Temperature Grade | Commercial | — |
| Terminal Form | J-BEND | — |
| Package Code | QCCJ | — |
| Package Shape | SQUARE | — |
| Architecture | Programmable Logic Array + Macrocell Registers + PIA interconnect | — |
| Family | — | MAX 5000 |
| Total Inputs | — | 71 (64 I/O + 7 dedicated) |
| Maximale Taktfrequenz | — | 66.7 MHz |
| Programmable Security Bit | — | Yes |
| Logic Voltage Compatibility | — | 5 V TTL |
| Configuration Memory | — | EPROM (UV-erasable, windowless in this package) |
| Betriebstemperatur | — | [DATA_NEEDED: commercial/industrial/military grade] |
| RoHS-Status | — | unknown (legacy Altera part) |