EPM5192AQC100-20 vs EPM5192AQI100-15 Vergleich
Detaillierter Direktvergleich von EPM5192AQC100-20 von Altera und EPM5192AQI100-15 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192AQC100-20 | EPM5192AQI100-15 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $11,85 | $21,40 |
| Device Family | MAX 5000 | — |
| Product Type | Complex Programmable Logic Device (CPLD) | — |
| Macrocells | 192 | 192 |
| Maximum Operating Frequency | 66.7 MHz | — |
| Propagation Delay (tpd) | 33 ns | 15 ns (speed grade -15) |
| Gehäuse | 100-lead PQFP (R-PQFP-G100) | PQFP-100 (R-PQFP-G100), 100-pin Plastic Quad Flat Pack |
| Terminal Pitch | 0.65 mm | — |
| Process Technology | CMOS | — |
| Programming Technology | UV-Erasable / One-Time-Programmable (OTP) | — |
| Versorgungsspannung | 5 V (typical, MAX 5000 family) | [DATA_NEEDED: VCC typical value] |
| Betriebstemperaturbereich | [DATA_NEEDED: operating temperature range] | — |
| I/O Count | [DATA_NEEDED: usable I/O count] | — |
| Logic Array Blocks | Multiple LABs (per MAX 5000 architecture) | — |
| Montageart | Surface Mount (PQFP) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Family | — | MAX 5000 |
| Series | — | MAX® 5000 EPLD |
| Device Type | — | OT PLD (One-Time-Programmable EPLD), CMOS |
| Logic Array Blocks (LABs) | — | 12 |
| Programmable I/O Lines | — | 64 |
| Dedicated Inputs | — | 7 |
| Total Logical Inputs | — | 72 |
| Propagation Delay (max datasheet) | — | 25 ns |
| Maximum Internal Frequency | — | 83.3 MHz |
| Operating Temperature Grade | — | Industrial (-40C to +85C) - 'I' suffix |
| Programming Method | — | JTAG via Altera programming hardware (ByteBlasterMV, USB-Blaster) |
| Technology | — | CMOS, EPROM-based (UV-erasable on windowed versions, OTP on this part) |