EPM5192GI vs EPM5192JI Vergleich
Detaillierter Direktvergleich von EPM5192GI von Altera und EPM5192JI von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192GI | EPM5192JI |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $18,95 | $9,75 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (UV-erasable CMOS Programmable Logic Device) |
| Technology | CMOS EPROM (UV-erasable / OTP) | CMOS EPROM, UV-erasable |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 16 (12 macrocells per LAB) | 12 |
| User I/O Pins | 64 | 64 |
| Dedicated Inputs | 7 | 7 |
| Total Inputs | 72 | — |
| Propagation Delay (tPD) | 55 ns | — |
| Maximum Internal Frequency (fCNT) | 33.3 MHz | — |
| Supply Voltage (VCC) | 4.5 V to 5.5 V (nominal 5 V) | — |
| Betriebstemperatur | -40 C to +85 C (Industrial) | -40 C to +125 C (industrial, I-suffix) |
| Package Type | 84-pin PGA (Pin Grid Array), ceramic with quartz window | — |
| Programmable | UV-erasable (windowed) and OTP variants | — |
| Montageart | Through-hole (PGA) | Surface Mount (PLCC socket recommended for UV erasure) |
| RoHS-Status | [DATA_NEEDED: not confirmed in verified web data] | [DATA_NEEDED: RoHS status - pre-2010 part, likely non-compliant] |
| Propagation Delay (tpd) | — | 55 ns |
| Versorgungsspannung | — | 4.75 V to 5.25 V (nominal 5 V) |
| Gehäuse | — | 84-pin PLCC (windowed, J-suffix ceramic) |
| Programming Method | — | Altera MAX 5000 programming algorithm (device programmer) |
| Erasure Method | — | UV exposure through windowed package |