EPM5192GM-1 vs EPM5192GC-1 Vergleich
Detaillierter Direktvergleich von EPM5192GM-1 von Altera und EPM5192GC-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192GM-1 | EPM5192GC-1 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $27,80 | $17,85 |
| Family | MAX 5000 | MAX 5000 (Classic) |
| Logic Cells | 192 | — |
| Propagation Delay (tpd) | 55 ns | — |
| Process Technology | CMOS | CMOS, UV-erasable / OTP |
| Programmable Element | UV-erasable EPROM | — |
| Gehäuse | CPGA-84 (Windowed Ceramic PGA) | 100-pin Ceramic PGA (GC) |
| Pin-Anzahl | 84 | — |
| Versorgungsspannung | [DATA_NEEDED: VCC nominal] | — |
| Betriebstemperaturbereich | [DATA_NEEDED: commercial/industrial/military grade] | — |
| Programmable Macrocells | 192 | — |
| User I/O Pins | [DATA_NEEDED: user I/O count] | 64 |
| Montageart | Through-Hole (Pin Grid Array socket) | Through-Hole (PGA) |
| RoHS Compliance | unknown (legacy ceramic PGA) | — |
| Lead-Free Status | unknown | — |
| Programming Interface | Altera ByteBlaster / JEDEC bitstream | — |
| Development Tool | Altera MAX+PLUS II (legacy) | — |
| Logic Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 192 |
| Usable Gates | — | 3,750 |
| Logic Array Blocks (LABs) | — | 12 |
| Dedicated Inputs | — | 7 |
| Maximum Propagation Delay (tPD) | — | 40 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Configuration Method | — | UV-Erase / One-Time Programmable |
| Interconnect | — | Peripheral Interconnect Array (PIA) |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature grade] |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |