EPM5192JC-1 vs EPM5192GC84-1 Vergleich
Detaillierter Direktvergleich von EPM5192JC-1 von Altera und EPM5192GC84-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192JC-1 | EPM5192GC84-1 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $22,40 | $14,20 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Technology | CMOS, UV-Erasable / OTP | CMOS (EPROM-cell based) |
| Macrocells | 192 | 192 |
| Usable Gates | 3750 | — |
| Propagation Delay (tPD) | 40 ns (speed grade -1) | 40 ns (speed grade -1) |
| Maximum Internal Frequency (fMAX) | 62.5 MHz | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V | 4.75 V to 5.25 V |
| User I/O Pins | 84 | 64 |
| Package Type | 84-pin Ceramic Quad Flat Pack (CQFP), windowed | — |
| JEDEC Package Code | S-CQCC-J84 | — |
| Betriebstemperatur | 0 C to +70 C (commercial) | — |
| Configuration Memory | UV-EPROM (erasable under UV lamp) | — |
| Programming Interface | Altera MAX programming interface (parallel, pre-JTAG for this family) | — |
| Process | CMOS EPROM | — |
| I/O Standard | TTL/CMOS 5 V compatible | — |
| Product Type | — | UV-Erasable/OTP Complex PLD (CPLD) |
| Maximale Taktfrequenz | — | 50 MHz |
| Dedicated Inputs | — | 7 |
| Total Inputs / Outputs | — | 72 inputs / 64 outputs |
| Architecture | — | Shared input/clock and shared product terms |
| Gehäuse | — | 84-pin PGA (Pin Grid Array), WPGA code |
| Temperature Grade | — | Commercial |
| Montageart | — | Through-hole (PGA socket) |
| RoHS-Status | — | Compliant (per third-party distributor listing) |
| Programming Method | — | UV erasure (quartz window) + EPROM programmer |
| Logic Element Type | — | Macrocells with AND/OR array |