EPM5192JC1 vs EPM5192JC-ES Vergleich

Detaillierter Direktvergleich von EPM5192JC1 von Intel und EPM5192JC-ES von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5192JC1 EPM5192JC-ES
Marke Intel Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $48,30 $16,45
Family MAX 5000 (MAX 5xxx CPLD) —
Manufacturer Intel (formerly Altera Corporation) —
Macro Cells 192 —
Usable Gates 3750 —
Maximum Operating Frequency 62.5 MHz —
Supply Voltage (VCC) 5 V (nominal) —
Process Technology 0.5 µm CMOS, UV-erasable EPROM —
Propagation Delay (typ) [DATA_NEEDED: propagation delay in ns] —
I/O Pins [DATA_NEEDED: I/O pin count] —
Gehäuse [DATA_NEEDED: exact package from datasheet] 84-pin PLCC (J-lead, CQCC, JEDEC S-CQCC-J84)
Montageart [DATA_NEEDED: surface mount or through-hole] Surface Mount
Betriebstemperatur [DATA_NEEDED: operating temp range] [DATA_NEEDED: operating temperature range for ES grade]
Programming Interface JTAG-compatible (Altera MAX 5xxx) —
Logic Blocks (LABs) 24 (8 macrocells per LAB) —
RoHS-Status unknown [DATA_NEEDED: RoHS compliance]
AEC-Q100 not_applicable —
Lifecycle Obsolete - last-time-buy stock only at franchised distributors —
Device Family — MAX 5000
Device Type — CPLD (EPLD)
Macrocells — 192
Logic Array Blocks (LABs) — 12
Interconnect — Programmable Interconnect Array (PIA)
Configuration Memory — EPROM (UV-erasable, one-time programmable for JC-ES)
Technology — CMOS
Programming — Altera MAX+PLUS II or compatible programmer
Versorgungsspannung — [DATA_NEEDED: VCC nominal]
User I/O Pins — [DATA_NEEDED: user I/O count for JC-ES in PLCC-84]
Lead-Free — [DATA_NEEDED: lead-free status]
MSL-Level — [DATA_NEEDED: MSL rating]
Note — Datasheet source: Altera MAX 5000 family document, 52 pages

Datenblätter & Ressourcen

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