EPM5192JC2 vs EPM5192GC-1 Vergleich
Detaillierter Direktvergleich von EPM5192JC2 von Intel und EPM5192GC-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192JC2 | EPM5192GC-1 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $15,90 | $17,85 |
| Family | MAX 5000 | MAX 5000 (Classic) |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 192 | 192 |
| Logic Array Blocks (LABs) | 12 | 12 |
| Usable Gates (equivalent) | 6000 | — |
| Maximum User I/O | 64 | — |
| Dedicated Inputs | 7 | 7 |
| External Clock Inputs | 1 (with shared input/clock capability) | — |
| Maximale Taktfrequenz | 50 MHz | — |
| Propagation Delay (tPD) | 45 ns (speed grade -2) | — |
| Process Technology | CMOS, UV-erasable | CMOS, UV-erasable / OTP |
| Interconnect | Programmable Interconnect Array (PIA) | Peripheral Interconnect Array (PIA) |
| Gehäuse | PLCC-68 (JC) | 100-pin Ceramic PGA (GC) |
| Montageart | Surface Mount (socketable PLCC) | Through-Hole (PGA) |
| Programming | Altera Master Programmer / ByteBlaster via JTAG-style interface | — |
| Logic Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 3,750 |
| User I/O Pins | — | 64 |
| Maximum Propagation Delay (tPD) | — | 40 ns |
| Maximum Frequency (fMAX) | — | 62.5 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Configuration Method | — | UV-Erase / One-Time Programmable |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature grade] |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |