EPM5192JC84-1 vs EPM5192JC-2 Vergleich
Detaillierter Direktvergleich von EPM5192JC84-1 von Altera und EPM5192JC-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192JC84-1 | EPM5192JC-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $15,20 | $22,50 |
| Device Type | UV-Erasable/OTP Complex Programmable Logic Device (CPLD) | — |
| Family | MAX 5000 | — |
| Macrocells | 192 | 192 |
| Propagation Delay (tpd) | 40 ns (worst case) | — |
| Supply Voltage (Vcc) | 4.75 V to 5.25 V (5 V ±5 %) | — |
| Process Technology | CMOS EPROM | CMOS |
| Operating Temperature Grade | Commercial | — |
| Gehäuse | 84-terminal Ceramic Chip Carrier (CQCC84 / J-lead) | 84-pin CQCC (Ceramic Quad Flat Pack, J-lead, windowed) |
| JESD-30 Package Code | S-CQCC-J84 | — |
| Terminal Form | J-BEND | — |
| Package Shape | SQUARE | — |
| Montageart | Surface Mount | Surface Mount |
| Programmability | UV-erasable (window) / OTP in production | — |
| Configuration Memory | EPROM (non-volatile, instant-on) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance] |
| Device Family | — | MAX 5000 |
| Product Type | — | UV-erasable Programmable Logic Device (PLD) |
| Logic Array Blocks (LABs) | — | 12 |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| User I/O Pins | — | 64 |
| Dedicated Inputs | — | 7 |
| External Clock Inputs | — | 1 |
| Propagation Delay (tPD) | — | 45 ns |
| Maximale Taktfrequenz | — | 40 MHz |
| Number of Terminals | — | 84 |
| Programming Method | — | UV-erase / EPROM |
| Betriebstemperaturbereich | — | [DATA_NEEDED: operating temperature range] |