EPM5192LC-2 vs EPM5192LC-25 Vergleich

Detaillierter Direktvergleich von EPM5192LC-2 von Altera und EPM5192LC-25 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM5192LC-2 EPM5192LC-25
Marke Altera Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $7,95 $55,00
Family MAX 5000 MAX 5000
Device Type CPLD (Complex Programmable Logic Device) —
Macrocells 192 192
Logic Array Blocks (LABs) 12 —
User I/O Pins 64 —
Dedicated Input Pins 7 —
External Clock Inputs 1 —
Propagation Delay (tPD) 45 ns (typical, -2 speed grade) —
Maximum Internal Frequency 50 MHz —
Interconnect Programmable Interconnect Array (PIA) —
Process Technology CMOS —
Gehäuse PQCC-84 (PLCC-84, J-lead, surface mount) JLCC-84 (ceramic J-lead chip carrier)
Programming Non-volatile (EPROM/EEPROM-based, in-system programmable via JTAG) —
Betriebstemperatur [DATA_NEEDED: commercial/industrial/military grade] 0C to +70C (commercial)
Versorgungsspannung 5 V (typical MAX 5000 family) 5 V (typical, MAX 5000)
RoHS-Status [DATA_NEEDED: pre-RoHS legacy part — likely non-RoHS] Unknown (legacy ceramic package typically non-RoHS)
Product Type — CPLD (Complex Programmable Logic Device)
Logic Elements — 192 (1 macrocell ≈ 1 LE in MAX 5000 architecture)
Pin-to-Pin Delay (tPD) — 25 ns
Speed Grade — -25 (25 ns)
Montageart — Surface Mount
Programmable Technology — UV-erasable / OTP (EPROM-based)
Programming Interface — JTAG / Altera programming hardware (legacy)
I/O Standard — TTL-compatible
Configuration Memory — Non-volatile EPROM (on-chip)
Manufacturer — Altera Corporation (now Intel PSG)

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