EPM5192LC-45 vs EPM5192LC-35 Vergleich
Detaillierter Direktvergleich von EPM5192LC-45 von Altera und EPM5192LC-35 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192LC-45 | EPM5192LC-35 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $24,00 | $15,25 |
| Family | MAX 5000 | MAX 5000 CPLD |
| Series | EPM5192 | MAX 5000 |
| Macrocells | 192 | — |
| Logic Elements | 192 macrocells | — |
| Maximum Operating Frequency | 100 MHz | — |
| Pin-to-Pin Delay (tPD) | 45 ns | 35 ns |
| Dedicated Inputs | [DATA_NEEDED: dedicated input count] | — |
| Programmable I/O Pins | [DATA_NEEDED: I/O pin count] | — |
| Configuration Memory | UV-erasable EPROM / OTP | — |
| Technology | EPROM-based CMOS | — |
| Package Type | LCC (Leaded Ceramic Chip Carrier) with UV window | JLCC (J-Lead Ceramic Chip Carrier) |
| Package Code | LC | — |
| Speed Grade | -45 (45 ns tPD) | -35 |
| Betriebstemperatur | 0C to +70C (commercial) | Commercial (0C to +70C) per LC suffix |
| Versorgungsspannung | 5 V | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Non-compliant (ceramic hermetic package) |
| Montageart | Surface Mount (LCC) | Surface Mount |
| Datasheet Page Count | 52 pages | — |
| Logic Elements / Macrocells | — | 192 macrocells |
| Programmable Type | — | UV-Erasable / OTP (EPROM-based) |
| Logic Voltage | — | 5 V TTL-compatible I/O |
| Programming Method | — | Altera legacy programmer (EPROM-based) |
| Architecture | — | LAB-based with Programmable Interconnect Array (PIA) |
| I/O Standard | — | TTL |
| Lebenszyklusstatus | — | Obsolete - last-time-buy stock only |
| Datasheet Document | — | Altera MAX 5000 family datasheet (per alldatasheet.com) |