EPM5192LC84 vs EPM5192GC84-1 Vergleich
Detaillierter Direktvergleich von EPM5192LC84 von Altera und EPM5192GC84-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM5192LC84 | EPM5192GC84-1 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $15,95 | $14,20 |
| Product Type | Complex Programmable Logic Device (CPLD) | UV-Erasable/OTP Complex PLD (CPLD) |
| Family | MAX 5000 | MAX 5000 |
| Macrocells (Logic Cells) | 192 | — |
| Propagation Delay (tPD) | 55 ns | 40 ns (speed grade -1) |
| Process Technology | CMOS | — |
| Programmability | OTP / UV-Erasable | — |
| Gehäuse | LCC-84 (PQCC84, MS-018) | 84-pin PGA (Pin Grid Array), WPGA code |
| Pin-Anzahl | 84 | — |
| Montageart | Surface Mount (Socket-compatible) | Through-hole (PGA socket) |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | — |
| Versorgungsspannung | [DATA_NEEDED: VCC range] | — |
| User I/O | [DATA_NEEDED: max user I/O count] | — |
| Configuration Memory | EPROM / UV-Erasable | — |
| Programming Interface | JTAG / Altera legacy (MAX+PLUS II baseline) | — |
| RoHS-Status | unknown | Compliant (per third-party distributor listing) |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| Technology | — | CMOS (EPROM-cell based) |
| Macrocells | — | 192 |
| Maximale Taktfrequenz | — | 50 MHz |
| Supply Voltage (VCC) | — | 4.75 V to 5.25 V |
| Dedicated Inputs | — | 7 |
| User I/O Pins | — | 64 |
| Total Inputs / Outputs | — | 72 inputs / 64 outputs |
| Architecture | — | Shared input/clock and shared product terms |
| Temperature Grade | — | Commercial |
| Programming Method | — | UV erasure (quartz window) + EPROM programmer |
| Logic Element Type | — | Macrocells with AND/OR array |