EPM570GT100C5N vs EPM570GT100C4 Vergleich
Detaillierter Direktvergleich von EPM570GT100C5N von Intel und EPM570GT100C4 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM570GT100C5N | EPM570GT100C4 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $11,05 | $17,25 |
| Series | MAX II | MAX II |
| Logic Elements | 570 | — |
| Equivalent Macrocells | 440 | — |
| User I/O | 76 | — |
| LABs | 36 | — |
| Maximum Frequency | 304 MHz | — |
| Pin-to-Pin Delay | [DATA_NEEDED: tPD value] | — |
| User Flash Memory (UFM) | 8 Kbit | 8 Kbits |
| Operating Supply Voltage (VCCINT) | 2.5 V / 3.3 V | — |
| I/O Standards Supported | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVTTL/LVCMOS | — |
| Gehäuse | TQFP-100 | 100-pin TQFP (14x14 mm) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to +85C (Commercial) | 0C to +85C (Commercial Extended) |
| Programmability | Flash-based, non-volatile (ISP via JTAG) | — |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS compliance status] |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LE) | — | 570 |
| Macro Cells | — | 440 |
| Pin-to-Pin Delay (tPD) | — | 5.4 ns |
| Internal Operating Frequency | — | Up to 304 MHz |
| Internal Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V |
| I/O Supply Voltage (VCCIO) | — | 2.5 V / 3.3 V (MultiVolt) |
| User I/O Pins | — | 100 |
| Programmable Type | — | In-System Programmable (ISP) via JTAG |
| Configuration Memory | — | Non-volatile flash (no external PROM required) |