EPM570GT144C3 vs EPM570GT144C5 Vergleich
Detaillierter Direktvergleich von EPM570GT144C3 von Intel und EPM570GT144C5 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM570GT144C3 | EPM570GT144C5 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $13,50 | $14,20 |
| Family | MAX II | MAX II G |
| Logic Elements (LEs) | 570 | 570 |
| Equivalent Macrocells | 440 | — |
| User I/O Count | 76 (max, package-dependent) | — |
| Pin-to-Pin Propagation Delay (tPD1) | 5.4 ns (commercial, fastest speed grade) | — |
| User Flash Memory (UFM) | 8 Kbits (8,192 bits) | — |
| Core Supply Voltage | 1.8 V (internal regulator from VCCINT 3.3 V) | — |
| I/O Supply Voltages | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Betriebstemperatur | 0 °C to +85 °C (commercial, C3 grade) | 0C to +85C (commercial) |
| Gehäuse | 144-pin TQFP (GT144) | 144-TQFP (20x20 mm) |
| Montageart | Surface Mount | Surface Mount |
| Process Technology | 0.30 µm 6-layer-metal flash CMOS | — |
| Configuration Method | Non-volatile on-chip flash (instant-on) | — |
| Programming Interface | JTAG IEEE 1149.1 (ISP) | — |
| RoHS-Status | Compliant | Compliant |
| MSL-Level | MSL 3 (per JEDEC J-STD-020) | — |
| Series | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 440 |
| User I/O Pins | — | 80 |
| User Flash Memory | — | 8.0 Kbits |
| Pin-to-Pin Delay (tPD) | — | 5.4 ns |
| Programmable Type | — | In-System Programmable (Flash) |
| Core Voltage VCCINT | — | 1.71 V to 1.89 V (internal regulator) |
| I/O Bank Voltage VCCIO | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| LVDS Support | — | Yes (MAX II G feature, up to 300 Mbps) |
| Lead-Free | — | Yes |