EPM570T100A5N vs EPM240T100C5N Vergleich
Detaillierter Direktvergleich von EPM570T100A5N von Altera und EPM240T100C5N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM570T100A5N | EPM240T100C5N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $6,72 | $4,65 |
| Device Family | MAX II | — |
| Logic Elements | 570 | — |
| Macrocells | 440 | — |
| User I/O Pins | 76 | — |
| Number of Logic Array Blocks (LABs) | 57 | — |
| Gehäuse | 100-pin TQFP | 100-pin TQFP (T100), 14x14 mm |
| Pin-to-Pin Logic Delay (tPD) | 5.4 ns | — |
| Maximum Internal Frequency | 304 MHz | 201.1 MHz |
| Core Supply Voltage (VCCINT) | 1.8 V (typical) | 2.5 V / 3.3 V |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| User Flash Memory (UFM) | 8 Kbits | — |
| Configuration Memory | On-chip non-volatile flash | — |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | JTAG (IEEE 1149.1) / ISP |
| Betriebstemperatur | -40 °C to +125 °C (industrial) | 0 °C to +85 °C (commercial, 'C' suffix) |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant | Compliant (lead-free) |
| Family | — | MAX II |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 240 |
| Equivalent Macrocells | — | 192 |
| On-Chip User Flash | — | 8 Kbits |
| Maximum User I/O Pins | — | 80 |
| Number of I/O Banks | — | 4 |
| Pin-to-Pin Delay (speed grade 5) | — | 4.7 ns |
| Process Technology | — | 0.18 µm, 6-layer-metal flash |