EPM7096LC84-7 vs EPM7096LC68-15 Vergleich
Detaillierter Direktvergleich von EPM7096LC84-7 von Intel und EPM7096LC68-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM7096LC84-7 | EPM7096LC68-15 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $19,85 | $7,20 |
| Family | MAX 7000 | MAX 7000 |
| Macrocells | 96 | 96 |
| Logic Array Blocks (LABs) | 4 | 4 |
| User I/O Pins | 64 | 52 |
| Speed Grade (tPD) | 7.5 ns | — |
| Gehäuse | 84-pin PLCC (Plastic Leaded Chip Carrier) | PLCC-68 (LC68) |
| Montageart | Surface Mount | Surface Mount (PLCC socket compatible) |
| Versorgungsspannung | 5.0 V | — |
| Programming Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| Architecture | Second-generation MAX | — |
| I/O Logic Levels | 5.0 V TTL/CMOS-compatible | — |
| Betriebstemperatur | 0C to +70C (commercial, LC suffix) | 0C to +70C (commercial) |
| RoHS-Status | Non-compliant (original Altera product, leaded PLCC package) | — |
| Lebenszyklusstatus | Obsolete - PCN/PDN issued by Intel | — |
| Propagation Delay (tPD) | — | 15 ns |
| Supply Voltage (VCCINT/VCCIO) | — | 4.75 V to 5.25 V (5 V nominal) |
| Programmable Technology | — | EEPROM (second-generation MAX architecture) |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| Logic Gates (typical) | — | 1800 gates |
| Memory Bits | — | Non-volatile configuration, 100 erase/program cycles per macrocell |
| Lead-Free / RoHS | — | Compliant per Altera product page |
| Programming Tool Support | — | Altera MAX+PLUS II, Quartus II; ByteBlaster / ByteBlasterMV |