EPM7128AELC84-10N vs EPM7128SLC8410 Vergleich
Detaillierter Direktvergleich von EPM7128AELC84-10N von Intel und EPM7128SLC8410 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM7128AELC84-10N - MAX 7000A CPLD, 128 Macro, 10ns, 84-PLCC | Intel
EPM7128AELC84-10N ✓ AktivSpezifikationsvergleich
| Parameter | EPM7128AELC84-10N | EPM7128SLC8410 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,45 | $9,75 |
| Family | MAX 7000A | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | — |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| User I/O Pins | 68 | 68 |
| Supply Voltage (VCCINT) | 3.3 V | 4.75 V to 5.25 V (5 V nominal) |
| Maximum Internal Frequency (fCNT) | 147.1 MHz | — |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| In-System Programmability | Yes (JTAG IEEE 1149.1) | — |
| MultiVolt I/O Interface | 2.5 V / 3.3 V / 5 V mixed | — |
| Betriebstemperatur | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Gehäuse | 84-pin PLCC (J-Lead) | 84-pin PLCC (J-lead) |
| Montageart | Surface Mount / Through-Hole socket | Surface Mount (PLCC socket or direct solder) |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status - not stated in verified data] |
| Configuration Memory | Non-volatile EEPROM | — |
| Power-Up Speed | Instant-on (no boot PROM required) | — |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 128 |
| Logic Elements / Gates | — | 2500 usable gates |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Setup Time (tSU) | — | 7 ns |
| Maximum Operating Frequency | — | 125 MHz (counter) |
| I/O Voltage (MultiVolt) | — | 2.5 V / 3.3 V / 5.0 V |
| Program Memory Type | — | EEPROM (in-system programmable) |
| JTAG Support | — | IEEE Std 1149.1 boundary-scan |