EPM7128AETC100-10 vs EPM7128AETC100-5N Vergleich
Detaillierter Direktvergleich von EPM7128AETC100-10 von Intel und EPM7128AETC100-5N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM7128AETC100-5N - 128-Macrocell MAX 7000A CPLD, 5ns | Intel / Altera
EPM7128AETC100-5N ✓ AktivSpezifikationsvergleich
| Parameter | EPM7128AETC100-10 | EPM7128AETC100-5N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $13,85 | $6,85 |
| Family | MAX 7000A | MAX 7000A |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Macrocells | 128 | 128 |
| User I/Os | 84 | 84 |
| Usable Gates | 2.5K | — |
| Logic Array Blocks (LABs) | 8 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Supply Voltage (Core) | 3.3 V | — |
| I/O Tolerance | 5.0 V tolerant | — |
| Program Technology | EEPROM (in-system programmable) | — |
| Gehäuse | 100-pin TQFP (ET) | 100-pin TQFP |
| Betriebstemperatur | -40C to +85C (commercial/industrial) | 0C to +70C (commercial) |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| RoHS-Status | Compliant | Compliant |
| Lebenszyklusstatus | Obsolete (migrate to MAX II or MAX V) | — |
| Logic Gates (typical) | — | 2,500 |
| Pin-to-Pin Logic Delay (tPD) | — | 5 ns |
| Maximum Operating Frequency | — | 192.3 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Bank Supply Voltage (VCCIO) | — | 3.3 V or 2.5 V |
| 5V Tolerant Inputs | — | Yes (when VCCIO = 3.3 V) |
| Programmable Logic Type | — | EEPROM-based, in-system programmable |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) |
| Montageart | — | Surface Mount |