EPM7128AETC100-7N vs EPM7128AETI100-7N Vergleich
Detaillierter Direktvergleich von EPM7128AETC100-7N von Altera und EPM7128AETI100-7N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7128AETI100-7N - MAX 7000A CPLD 128 Macro 84 I/O | Intel/Altera
EPM7128AETI100-7N ObsoleteSpezifikationsvergleich
| Parameter | EPM7128AETC100-7N | EPM7128AETI100-7N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $31,80 | $28,50 |
| Family | MAX 7000A | MAX 7000A CPLD |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Macro Cells | 128 | 128 |
| Usable Gates | 2,500 | — |
| Logic Array Blocks (LABs) | 4 | — |
| User I/Os | 84 | — |
| Propagation Delay (tpd) | 7.5 ns | — |
| Counter Frequency (max) | 129.9 MHz | — |
| Internal Frequency (max) | 250 MHz | — |
| Core Supply Voltage | 3.3 V | — |
| Logic Family | CMOS | — |
| Pin-Anzahl | 100 | — |
| Gehäuse | 100-TQFP | 100-pin TQFP (14x14 mm) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0 C to +70 C (Commercial) | -40C to +85C (Industrial) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant |
| Process Technology | 0.30 µm EEPROM CMOS | CMOS EEPROM |
| Series | — | MAX 7000A |
| Number of Usable Gates | — | 2,500 |
| Number of I/O | — | 84 |
| Number of Logic Array Blocks (LABs) | — | 8 |
| Propagation Delay (tPD max) | — | 7 ns |
| Maximum Operating Frequency (fCNT) | — | 129.9 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| I/O Bank Voltage (VCCIO) | — | 2.5 V / 3.3 V / 5.0 V (multi-volt I/O) |
| In-System Programmability | — | Yes (JTAG IEEE 1149.1) |