EPM7128ATC100-7F vs EPM7128AETC100-10 Vergleich
Detaillierter Direktvergleich von EPM7128ATC100-7F von Altera und EPM7128AETC100-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7128ATC100-7F - 128-Macrocell MAX 7000A CPLD, 7.5ns, 100-TQFP | Intel / Altera
EPM7128ATC100-7F NrndSpezifikationsvergleich
| Parameter | EPM7128ATC100-7F | EPM7128AETC100-10 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,85 | $13,85 |
| Family | MAX 7000A | MAX 7000A |
| Device | EPM7128A | — |
| Logic Elements / Macrocells | 128 macrocells | — |
| Logic Array Blocks (LABs) | 8 | 8 |
| Usable Gates | 2.5K | 2.5K |
| User I/O Pins | 84 (per MicrochipUSA) / 100 (per MAX 7000A datasheet range) | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency (fMAX) | 116.3 MHz | — |
| Supply Voltage - Internal | 3.0 V to 3.6 V (nominal 3.3 V) | — |
| I/O Voltage | 2.5 V / 3.3 V (MultiVolt) | — |
| Programmable Type | EEPROM (in-system programmable, non-volatile) | — |
| JTAG Support | IEEE Std 1149.1 boundary-scan + ISP | IEEE 1149.1 boundary-scan |
| Gehäuse | 100-pin TQFP (14x14 mm) | 100-pin TQFP (ET) |
| Betriebstemperatur | -40C to +85C (industrial) | -40C to +85C (commercial/industrial) |
| Process Technology | CMOS, EEPROM configuration | — |
| Montageart | Surface Mount | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 128 |
| User I/Os | — | 84 |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Tolerance | — | 5.0 V tolerant |
| Program Technology | — | EEPROM (in-system programmable) |
| Lebenszyklusstatus | — | Obsolete (migrate to MAX II or MAX V) |