EPM7128ATC100-7F vs EPM7128AETC100-7N Vergleich
Detaillierter Direktvergleich von EPM7128ATC100-7F von Altera und EPM7128AETC100-7N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7128ATC100-7F - 128-Macrocell MAX 7000A CPLD, 7.5ns, 100-TQFP | Intel / Altera
EPM7128ATC100-7F NrndSpezifikationsvergleich
| Parameter | EPM7128ATC100-7F | EPM7128AETC100-7N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,85 | $31,80 |
| Family | MAX 7000A | MAX 7000A |
| Device | EPM7128A | — |
| Logic Elements / Macrocells | 128 macrocells | — |
| Logic Array Blocks (LABs) | 8 | 4 |
| Usable Gates | 2.5K | 2,500 |
| User I/O Pins | 84 (per MicrochipUSA) / 100 (per MAX 7000A datasheet range) | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Maximum Internal Frequency (fMAX) | 116.3 MHz | — |
| Supply Voltage - Internal | 3.0 V to 3.6 V (nominal 3.3 V) | — |
| I/O Voltage | 2.5 V / 3.3 V (MultiVolt) | — |
| Programmable Type | EEPROM (in-system programmable, non-volatile) | — |
| JTAG Support | IEEE Std 1149.1 boundary-scan + ISP | — |
| Gehäuse | 100-pin TQFP (14x14 mm) | 100-TQFP |
| Betriebstemperatur | -40C to +85C (industrial) | 0 C to +70 C (Commercial) |
| Process Technology | CMOS, EEPROM configuration | 0.30 µm EEPROM CMOS |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Device Type | — | CPLD - Complex Programmable Logic Device |
| Macro Cells | — | 128 |
| User I/Os | — | 84 |
| Propagation Delay (tpd) | — | 7.5 ns |
| Counter Frequency (max) | — | 129.9 MHz |
| Internal Frequency (max) | — | 250 MHz |
| Core Supply Voltage | — | 3.3 V |
| Logic Family | — | CMOS |
| Pin-Anzahl | — | 100 |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |