EPM7128ATC144-10 vs EPM7128AETC144-10 Vergleich
Detaillierter Direktvergleich von EPM7128ATC144-10 von Altera und EPM7128AETC144-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM7128ATC144-10 | EPM7128AETC144-10 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,10 | $21,70 |
| Manufacturer | Altera (now Intel) | — |
| Series | MAX 7000A | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Programmable Type | EE PLD (EEPROM-based, in-system programmable) | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks | 4 | — |
| User I/O Pins | 68 | — |
| Propagation Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 98 MHz | — |
| Supply Voltage - Internal (VCCINT) | 3.0 V to 3.6 V | — |
| I/O Voltage Levels | 5.0 V / 3.3 V / 2.5 V compatible (MultiVolt I/O) | — |
| In-System Programmability | Yes (IEEE Std 1149.1 JTAG) | — |
| Betriebstemperatur | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Gehäuse / Bauform | 144-TQFP (20 x 20 mm) | — |
| Montageart | Surface Mount | Surface Mount |
| Architecture | Multiple Array Matrix (MAX), 2nd generation | — |
| RoHS-Status | unknown (legacy Altera device) | [DATA_NEEDED: rohs status from manufacturer] |
| Family | — | MAX 7000A |
| Usable Gates | — | 2,500 |
| Logic Array Blocks (LABs) | — | 8 |
| Maximum User I/Os | — | 36 |
| Pin-to-pin Logic Delay (tPD) | — | 10 ns |
| Maximum Internal Counter Frequency | — | 98 MHz |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Voltage Tolerance | — | 2.5 V / 3.3 V / 5 V |
| Gehäuse | — | 144-pin TQFP (also referred to as LQFP-144) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) and ByteBlaster |
| Non-volatile Memory | — | EEPROM, instant-on |
| Global Clocks / Global OE | — | 2 / 2 |
| MSL-Level | — | MSL 3 (per JEDEC J-STD-020) |