EPM7128ELC84-12 vs EPM7128ELC84-10 Vergleich
Detaillierter Direktvergleich von EPM7128ELC84-12 von Altera und EPM7128ELC84-10 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM7128ELC84-12 | EPM7128ELC84-10 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,40 | $7,20 |
| Family | MAX 7000 (MAX 7000E series) | MAX 7000 |
| Logic Family | CMOS, EEPROM-based | — |
| Usable Gates | 2,500 | — |
| Macrocells | 128 | 128 |
| Logic Array Blocks (LABs) | 8 | — |
| User I/Os | 84 | 68 |
| Propagation Delay (tpd1) | 12 ns | — |
| Internal Global Clock Frequency | 90.9 MHz | — |
| Setup Time | 4.5 ns | — |
| Supply Voltage (VCCINT / VCCIO) | 5 V (4.75 V to 5.25 V) | — |
| Betriebstemperatur | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Gehäuse | 84-pin PLCC (J-Lead, QCCJ) | 84-pin PLCC (J-Lead) |
| Montageart | Surface Mount (PLCC socket compatible) | Surface Mount / Socket |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | IEEE 1149.1 (JTAG) ISP |
| Pin-Anzahl | 84 | — |
| RoHS-Status | Non-compliant (legacy 5V part, SnPb finish) | [DATA_NEEDED: RoHS status from datasheet] |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Equivalent Logic Gates | — | [DATA_NEEDED: equivalent gate count from datasheet] |
| Dedicated Inputs | — | 12 |
| Operating Voltage (VCCINT/VCClO) | — | 5 V |
| Pin-to-Pin Delay (tPD) | — | 10 ns |
| Counter Frequency (fCNT) | — | [DATA_NEEDED: fCNT from datasheet] |
| Technology | — | EEPROM-based CMOS |
| In-System Programmable | — | Yes |
| Lead-Free | — | [DATA_NEEDED: lead-free status from datasheet] |