EPM7128ELC84-20 vs EPM7128SLC8410 Vergleich

Detaillierter Direktvergleich von EPM7128ELC84-20 von Altera und EPM7128SLC8410 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM7128ELC84-20 EPM7128SLC8410
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $24,20 $9,75
Series MAX 7000 —
Device Family EPM7128 (CPLD) —
Number of Macrocells 128 —
Number of Usable Gates 2500 —
Number of User I/Os 68 —
Number of Logic Array Blocks (LABs) 8 8
Propagation Delay (tPD) 20 ns 10 ns
Maximum Frequency (fCNT) 62.5 MHz —
Supply Voltage (VCC) 5 V —
Supply Voltage Tolerance 4.75 V to 5.25 V —
Technology CMOS, EEPROM-based (non-volatile) —
Programmable Interface IEEE Std. 1149.1 (JTAG) —
Package Type PLCC-84 (J-Lead, J-bend) —
Montageart Surface Mount (PLCC socket compatible) Surface Mount (PLCC socket or direct solder)
Betriebstemperatur 0C to +70C (commercial) 0C to +70C (commercial)
RoHS-Status Contains lead (pre-RoHS, SnPb finish) [DATA_NEEDED: RoHS status - not stated in verified data]
Product Type — CPLD (Complex Programmable Logic Device)
Family — MAX 7000S
Macrocells — 128
Logic Elements / Gates — 2500 usable gates
User I/O Pins — 68
Setup Time (tSU) — 7 ns
Maximum Operating Frequency — 125 MHz (counter)
Supply Voltage (VCCINT) — 4.75 V to 5.25 V (5 V nominal)
I/O Voltage (MultiVolt) — 2.5 V / 3.3 V / 5.0 V
Program Memory Type — EEPROM (in-system programmable)
JTAG Support — IEEE Std 1149.1 boundary-scan
Gehäuse — 84-pin PLCC (J-lead)

Datenblätter & Ressourcen

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