EPM7128SQC100-10F vs EPM7128SQC100-7 Vergleich
Detaillierter Direktvergleich von EPM7128SQC100-10F von Altera und EPM7128SQC100-7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7128SQC100-10F - 128-Macrocell MAX 7000 CPLD, 10ns, 100-PQFP | Altera (Intel)
EPM7128SQC100-10F ✓ AktivIntel
EPM7128SQC100-7 - 128-Macro 5V CPLD, 7.5ns, 100-Pin PQFP | Altera (Intel)
EPM7128SQC100-7 ObsoleteSpezifikationsvergleich
| Parameter | EPM7128SQC100-10F | EPM7128SQC100-7 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $4,95 | $10,85 |
| Family | MAX 7000S | MAX 7000S |
| Product Type | CPLD (Complex Programmable Logic Device) | CPLD - Complex Programmable Logic Device |
| Usable Gates | 2,500 | 2,500 |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 8 | — |
| User I/Os | 84 | 84 |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 100 MHz | — |
| Supply Voltage (VCCINT) | 5 V | — |
| Process Technology | CMOS EEPROM | — |
| Programmability | In-System Programmable (ISP) via JTAG (IEEE 1149.1) | — |
| Gehäuse | 100-pin PQFP (Plastic Quad Flat Pack) | 100-pin PQFP (Plastic Quad Flat Pack) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Lead-Free (F suffix) | Yes (Pb-free finish) | — |
| RoHS-Status | Compliant (F suffix variant) | Non-RoHS (legacy SnPb package) |
| Macro Cells | — | 128 |
| Logic Elements / LABs | — | 4 Logic Array Blocks (LABs) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency | — | 125 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| Technology | — | CMOS, EEPROM-based, non-volatile |
| Programming Interface | — | JTAG (IEEE Std 1149.1), in-system programmable |