EPM7128SQC100-10N vs EPM7128STC100-10N Vergleich
Detaillierter Direktvergleich von EPM7128SQC100-10N von Altera und EPM7128STC100-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7128STC100-10N - MAX 7000S CPLD 128-Macrocell 10ns TQFP-100 | Altera
EPM7128STC100-10N NrndSpezifikationsvergleich
| Parameter | EPM7128SQC100-10N | EPM7128STC100-10N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $14,95 | $9,30 |
| Family | MAX 7000 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | 2,500 |
| Logic Array Blocks (LABs) | 8 (16 macro cells each) | 8 (16 macrocells each) |
| User I/O Pins | 84 | — |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| Maximum Frequency | 100 MHz | — |
| Supply Voltage (VCCINT) | 5 V (4.75 V to 5.25 V) | 5 V |
| I/O Voltage Tolerance | 3.3 V or 5 V (MultiVolt interface) | — |
| Gehäuse | 100-pin PQFP (BQFP) | 100-pin TQFP (14 x 14 x 1 mm) |
| Configuration Memory | EEPROM (non-volatile) | — |
| Programming Interface | JTAG (IEEE Std 1149.1), 4-pin | — |
| Betriebstemperatur | -40C to +85C (industrial) | 0 C to +70 C (commercial) |
| Montageart | Surface Mount | Surface Mount |
| Lead-Free / RoHS Status | Lead-free (N suffix) | — |
| Architecture Generation | Second-generation MAX | — |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Macrocells | — | 128 |
| User I/Os | — | 84 |
| Internal Frequency (fMAX) | — | 100 MHz |
| I/O Voltage (VCCIO) | — | 3.3 V or 5 V (MultiVolt) |
| Process Technology | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG) |
| RoHS-Status | — | Compliant (Pb-free "N" suffix) |
| Lead-Free | — | Yes |