EPM7128SQC100-15 vs EPM7128SQC100-7 Vergleich
Detaillierter Direktvergleich von EPM7128SQC100-15 von Altera und EPM7128SQC100-7 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7128SQC100-15 - MAX 7000 CPLD 128MC 15ns 5V | Altera/Intel
EPM7128SQC100-15 ⚠ Letzte BestellmöglichkeitIntel
EPM7128SQC100-7 - 128-Macro 5V CPLD, 7.5ns, 100-Pin PQFP | Altera (Intel)
EPM7128SQC100-7 ObsoleteSpezifikationsvergleich
| Parameter | EPM7128SQC100-15 | EPM7128SQC100-7 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,20 | $10,85 |
| Family | MAX 7000 | MAX 7000S |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 128 | — |
| Logic Array Blocks (LABs) | 4 (16 macrocells each) | — |
| User I/Os | 84 | 84 |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Maximum Frequency (fMAX) | [DATA_NEEDED: fMAX value] | — |
| Typical Gate Count | 2,500 gates | — |
| Supply Voltage (VCCINT) | 5 V (5% tolerance) | — |
| Programming Technology | EEPROM (in-system programmable via JTAG) | — |
| JTAG Interface | IEEE Std. 1149.1 compliant | — |
| Gehäuse | 100-pin PQFP (Plastic Quad Flat Pack) | 100-pin PQFP (Plastic Quad Flat Pack) |
| Betriebstemperatur | 0C to +70C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | 3 (168 hours) | — |
| RoHS-Status | Non-compliant (SnPb lead finish - legacy PQFP) | Non-RoHS (legacy SnPb package) |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Macro Cells | — | 128 |
| Usable Gates | — | 2,500 |
| Logic Elements / LABs | — | 4 Logic Array Blocks (LABs) |
| Propagation Delay (tPD) | — | 7.5 ns |
| Maximum Internal Frequency | — | 125 MHz |
| Supply Voltage (VCCINT/VCCIO) | — | 5.0 V |
| Technology | — | CMOS, EEPROM-based, non-volatile |
| Programming Interface | — | JTAG (IEEE Std 1149.1), in-system programmable |