EPM7128SQC100-7 vs EPM7128SQC100-10N Vergleich
Detaillierter Direktvergleich von EPM7128SQC100-7 von Intel und EPM7128SQC100-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM7128SQC100-7 - 128-Macro 5V CPLD, 7.5ns, 100-Pin PQFP | Altera (Intel)
EPM7128SQC100-7 ObsoleteSpezifikationsvergleich
| Parameter | EPM7128SQC100-7 | EPM7128SQC100-10N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,85 | $14,95 |
| Product Type | CPLD - Complex Programmable Logic Device | — |
| Family | MAX 7000S | MAX 7000 |
| Macro Cells | 128 | 128 |
| Usable Gates | 2,500 | 2,500 |
| User I/Os | 84 | — |
| Logic Elements / LABs | 4 Logic Array Blocks (LABs) | — |
| Propagation Delay (tPD) | 7.5 ns | 10 ns |
| Maximum Internal Frequency | 125 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| Technology | CMOS, EEPROM-based, non-volatile | — |
| Gehäuse | 100-pin PQFP (Plastic Quad Flat Pack) | 100-pin PQFP (BQFP) |
| Programming Interface | JTAG (IEEE Std 1149.1), in-system programmable | JTAG (IEEE Std 1149.1), 4-pin |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Non-RoHS (legacy SnPb package) | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Array Blocks (LABs) | — | 8 (16 macro cells each) |
| User I/O Pins | — | 84 |
| Maximum Frequency | — | 100 MHz |
| Supply Voltage (VCCINT) | — | 5 V (4.75 V to 5.25 V) |
| I/O Voltage Tolerance | — | 3.3 V or 5 V (MultiVolt interface) |
| Configuration Memory | — | EEPROM (non-volatile) |
| Lead-Free / RoHS Status | — | Lead-free (N suffix) |
| Architecture Generation | — | Second-generation MAX |