EPM7128STC100-10 vs EPM7128EQC100-20 Vergleich
Detaillierter Direktvergleich von EPM7128STC100-10 von Altera und EPM7128EQC100-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7128STC100-10 - 128-Macro MAX 7000S CPLD, 10ns TQFP-100 | Intel / Altera
EPM7128STC100-10 Obsolete
Spezifikationsvergleich
| Parameter | EPM7128STC100-10 | EPM7128EQC100-20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,10 | $11,05 |
| Family | MAX 7000S | MAX 7000 |
| Device Type | CPLD (Complex Programmable Logic Device) | EPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | — |
| Usable Gates | 2,500 | 2.5K |
| User I/Os | 84 | 84 |
| Logic Array Blocks | 8 (16 macrocells per LAB) | — |
| Propagation Delay (tPD) | 10 ns | — |
| Internal Counter Frequency (fCNT) | 100 MHz | — |
| Logic Family | CMOS | — |
| Supply Voltage (VCCINT) | 5 V | — |
| MultiVolt I/O Voltage | 3.3 V / 5 V | — |
| Gehäuse | TQFP-100 (C100) | 100-pin PQFP (BQFP, gull-wing) |
| Pin-Anzahl | 100 | — |
| Montageart | Surface Mount | Surface Mount |
| Programmability | In-System Programmable (JTAG, IEEE 1149.1), EEPROM | — |
| Betriebstemperatur | 0C to +70C (commercial) | 0 C to 90 C (Commercial) |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status not in provided data] | — |
| Macrocells | — | 128 |
| Logic Elements / LABs | — | 8 LABs (16 macrocells per LAB) |
| Propagation Delay (tpd) | — | 20 ns |
| Maximum Internal Frequency | — | 250 MHz |
| Technology | — | CMOS, UV-erasable / EEPROM |
| Versorgungsspannung | — | 5 V |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| Compliance | — | RoHS compliance status not confirmed in web data |