EPM7160ELI84-20 vs EPM7160SLC84-15 Vergleich

Detaillierter Direktvergleich von EPM7160ELI84-20 von Intel und EPM7160SLC84-15 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPM7160ELI84-20 EPM7160SLC84-15
Marke Intel Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Obsolete Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $11,10 $10,80
Series MAX 7000 —
Device Family MAX 7000 (Complex Programmable Logic Device) —
Number of Macrocells 160 —
Number of Logic Array Blocks (LABs) 4 —
Usable Gates 3.2K 3,200
Number of User I/O Pins 64 —
Maximum Operating Frequency 62.5 MHz —
Pin-to-Pin Propagation Delay (tPD) 20 ns (speed grade '-20') —
Supply Voltage (VCC) 5.0 V —
Process Technology CMOS, EEPROM-based configuration —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Programmable Security Yes (security bit) —
Gehäuse 84-Pin PLCC (J-Lead) —
Montageart Surface Mount Surface Mount (PLCC socket or direct solder)
Betriebstemperatur -40C to +85C (Industrial grade 'I') 0 C to 70 C
RoHS-Status Not Compliant (per Arrow listing) Not RoHS compliant (contains lead, SnPb finish typical)
Configuration Memory Non-volatile EEPROM (instant-on) —
Family — MAX 7000
Macrocells — 160
Maximum Propagation Delay — 15 ns
Maximum User I/O Pins — 64
Supply Voltage (VCCINT/VCIO) — 4.75 V to 5.25 V (5 V nominal)
I/O Logic Level — Configurable 3.3 V or 5 V
Technology — CMOS, EEPROM configuration
Package Type — PLCC-84 (PQCC84, JEDEC S-PQCC-J84)
Terminal Pitch — 1.270 mm
Programming Interface — JTAG (IEEE 1149.1) in-system programmable
Lifecycle — Obsolete / last-time-buy (per Altera/Intel PDN)

Datenblätter & Ressourcen

Alle Produkte durchsuchen BOM erstellen Angebot anfordern