EPM7160STI100-10 vs EPM7160STC100-10N Vergleich
Detaillierter Direktvergleich von EPM7160STI100-10 von Altera und EPM7160STC100-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM7160STC100-10N - MAX 7000 CPLD, 160 Macrocells, TQFP-100 | Altera
EPM7160STC100-10N ObsoleteSpezifikationsvergleich
| Parameter | EPM7160STI100-10 | EPM7160STC100-10N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $90,43 | $15,95 |
| Family | MAX 7000S | MAX 7000S |
| Macrocells | 160 | 160 |
| Usable Gates | 3,200 | — |
| User I/Os | 84 | 84 |
| Logic Elements / Blocks | 16 Logic Array Blocks (LABs) | — |
| Propagation Delay (tPD) | 10 ns | 10 ns |
| Maximum Operating Frequency | 100 MHz | — |
| Internal Supply Voltage | 4.75 V to 5.25 V | — |
| I/O Supply Voltage | 5.0 V | — |
| Programmable Type | In-System Programmable (EEPROM) | In-System Programmable (ISP) via JTAG |
| Betriebstemperatur | -40 C to +85 C (Industrial) | 0C to +70C (Commercial) |
| Gehäuse | TQFP-100 (100-pin Thin Quad Flat Pack) | TQFP-100 (1 mm height, plastic) |
| Montageart | Surface Mount | Surface Mount |
| JTAG / Boundary Scan | IEEE Std. 1149.1 compliant | — |
| PCI Compliance | PCI Local Bus Specification Rev. 2.2 (for -10 speed grade) | Yes (66 MHz) |
| RoHS-Status | [DATA_NEEDED: RoHS status - not explicitly stated in provided data] | [DATA_NEEDED: RoHS status] |
| MSL-Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Equivalent Gates | — | 3.2K |
| Internal Operating Frequency | — | 167 MHz max |
| Supply Voltage (VCCINT) | — | 4.75 V to 5.25 V |
| I/O Voltage (VCCIO) | — | 3.0 V to 5.25 V (MultiVolt) |
| Logic Family | — | CMOS |
| Configuration Memory | — | EEPROM (non-volatile) |
| JTAG (IEEE 1149.1) | — | Yes |